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Google Taps Marvell for Two Custom AI Inference Chips, Shaking Broadcom's TPU Grip

Michael Ouroumis2 min read
Google Taps Marvell for Two Custom AI Inference Chips, Shaking Broadcom's TPU Grip

Google is in advanced discussions with Marvell Technology to co-develop two custom AI chips aimed at the inference workloads now dominating cloud compute bills, according to reports published April 20 and April 21. The move adds a third design partner to Google's TPU supply chain and sent Marvell shares to a record high while Broadcom, Google's incumbent TPU partner, slipped.

Two chips, one inference-first strategy

The partnership centers on two distinct designs. The first is a memory processing unit, or MPU, engineered to sit alongside Google's existing Tensor Processing Units and shorten the data path between the accelerator and memory — a choke point that inflates latency and power draw as models scale. The second is a new TPU purpose-built for inference, the phase where trained models serve user queries rather than learn from data.

Reports indicate Google and Marvell plan to finalize the design next year ahead of trial production, with initial plans to manufacture approximately 2 million MPUs. No contract has been signed yet, and Marvell's role is described as a design-services engagement similar to MediaTek's involvement in Google's Ironwood TPU.

Market reaction: Marvell up, Broadcom down

Marvell's stock surged on the news, extending a 30% April jump that followed a separate Nvidia partnership announcement and pushing the shares roughly 50% higher year to date. Broadcom, which commands more than 70% of the custom AI accelerator market, slid on the report even though analysts noted the Google talks do not appear to threaten its position. Broadcom holds a through-2031 TPU agreement with Google that reportedly contributes around $21 billion in 2026 revenue tied to Google and Anthropic relationships alone.

Marvell itself generated more than $6 billion in data center revenue in fiscal 2026, with custom silicon work reaching roughly $1.5 billion — a business backed by 18 XPU and XPU-attach socket design wins across major hyperscalers — a base that a Google program of this scale could materially expand.

Why inference, why now

The timing reflects a broader compute shift. Custom ASIC sales are projected to grow 45% in 2026, with the segment forecast to reach $118 billion by 2033 as hyperscalers build around workloads where inference cost — not training — sets the unit economics. Google has signaled for months that the center of gravity in its AI stack is moving toward inference at hyperscale, where memory bandwidth and power efficiency matter more than raw training throughput.

Implications

For Google, spreading designs across Broadcom, MediaTek, Marvell and TSMC fabrication reduces single-supplier risk at a moment when every hyperscaler is racing to lock in multi-gigawatt capacity. For Nvidia, it is another data point in a quietly accelerating trend: the largest AI buyers are increasingly co-designing their own silicon rather than buying general-purpose GPUs. And for Broadcom, the message is that dominance in custom AI accelerators does not mean exclusivity — even with its biggest customer.

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